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Design of GPIO core in RTL

By chipmunk August 16, 2025 6

5 min read: GPIOs may look like simple pins on a microcontroller, but under the hood lies a simple digital block that enables buttons, LEDs, and sensors to connect with the chip. Discover how a GPIO core works and how it's designed in RTL...

White Papers

Benchmarking a RISC-V CPU using CoreMark

By chipmunk May 8, 2025 1

15 min read: How do you benchmark a RISC-V CPU? How to validate and evaluate the CPU performance with CoreMark? Read on...

Digital Logic Design White Papers

Static Timing Analysis by Examples – using SDC

By chipmunk December 14, 2024 0

5 min read: Performing STA of your RTL designs with SDC can sometimes be intimidating, especially for the beginners. Let's break it down in today's blog...

Digital Logic Design Pequeno CPU

Designing RISC-V CPU from scratch – Part 6: Register File

By chipmunk October 4, 2024 2

10 min read: Ever fancied designing your own processor but had no idea where to start with? Part-6 of RISC-V CPU Development blog series is here...

Digital Logic Design Pequeno CPU

Designing RISC-V CPU from scratch – Part 5: Decode Unit

By chipmunk April 6, 2024 4

10 min read: Ever fancied designing your own processor but had no idea where to start with? Part-5 of RISC-V CPU Development blog series is here...