IP Catalog

All the open-source IP cores released by Chipmunk Logic are available for free download below. All the designs are synthesisable soft IP cores written in System Verilog/Verilog/VHDL, and are FPGA proven. Please go through the IP overview before downloading the IP package.

S No.	IP	Version	RTL	Status	License	IP Package	Resources
1	GPIO	v1.0	SV/V	Stable, FPGA proven	No restrictions	Download	IP Overview: gpio_v1_0 User Guide: GPIO v1.0 – User Guide Read the blog here [Publishing soon!]
2	Reset Controller	v1.1	SV/V	Stable, FPGA proven	No restrictions	Download	IP Overview: reset_controller_v1_1 User Guide: Reset Controller v1.1 – User Guide Read the blog here
3	Seven Segment Decoder	v1.0	SV/V	Stable, FPGA proven	No restrictions	Download	IP Overview: sev_seg_decoder_v1_0 User Guide: Seven Segment Decoder v1.0 – User Guide Read the blog here
4	UART Controller	v1.1	SV/V	Stable, FPGA proven	No restrictions	Download	IP Overview: uart_v1_1 User Guide: UART Controller v1.1 – User Guide Read the blog here
5	UART Controller	v1.2	SV/V	Stable, FPGA proven	No restrictions	Download	IP Overview: uart_v1_2 User Guide: UART Controller v1.2 – User Guide Read the blog here
6	VGA Controller	v1.2	SV/V	Stable, FPGA proven	No restrictions	Download	IP Overview: vga_controller_v1_2 User Guide: VGA Controller v1.2 – User Guide Read the blog here

IP: gpio_v1_0 reset_controller_v1_1 sev_seg_decoder_v1_0 uart_v1_1 uart_v1_2 vga_controller_v1_2 Mail ID: Request for access!

Steps to get access:

1. Download the IP package
2. Choose the IP and request for access with your subscribed mail ID

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